Research verifying that the optimal number of PAUSE instructions to insert inside a spinlock differs across the multiple generations of CPU microarchitecture that coexist in a data center (Kono Lab, Keio University — master's research).
Data centers deploy machines spanning multiple generations of the same Intel x86_64 family — Broadwell, Skylake, Ice Lake (Sunny Cove), and more. Yet performance tuning rarely accounts for these microarchitecture differences; the same application configuration typically gets reused across all of them as-is.
The PAUSE instruction — a hint telling the processor "this is a spin-wait," used widely in major OSS spinlock implementations — was measured to have wildly different execution cycle counts by architecture: 21.90 cycles on Broadwell (Intel E5-2640 v4, 2.4GHz), versus 156.38 cycles on Skylake (Xeon Silver 4110, 2.10GHz) — about 7x Broadwell — and 53.27 cycles on Sunny Cove (Xeon Silver 4314, 2.40GHz).
A spinlock's wait strategy has two phases on lock-acquisition failure: a spin loop with N PAUSE instructions, then a sleep via the OS. Using Memcached as the workload — whose default behavior sleeps immediately on a failed lock — a PAUSE-spinning phase was added, modeled on MySQL's wait strategy. Throughput was measured with the mutilate benchmark across Broadwell, Skylake, and Sunny Cove while sweeping the PAUSE-insertion count N from 0 to 200 (4 cores / 4 threads, 32 concurrent requests per client thread, 1:1 read/write ratio).
The optimal insertion count N differed by architecture — architectures with a higher PAUSE cycle count reached peak throughput at a lower N. Across all three architectures, throughput improved as N increased, then gradually degraded past a certain point from excessive insertion — a consistent pattern.
Two hypotheses are under investigation: (1) from N=0 to the peak, reduced bus contention and lower wake-up cost drive the improvement — to be verified via cache-miss counts. (2) past the peak, excessive N delays response to lock release — to be verified via futex syscall counts. Next steps are to quantitatively confirm these with OS-level metrics, then extend the study to other workloads and other microarchitectures.